V6065 3U VPX Versal® Premium ASoC FPGA Optical I/O Module with XMC Site
The V6065 is a next-generation heterogeneous embedded computing 3U VPX module featuring the AMD Versal® Premium Adaptive System-on-Chip (ASoC), rugged optical and electrical high-speed IO, XMC site, and SOSA aligned profile options. The V6065 provides options for Versal® Premium VP1502 or VP1702 part selection. In a single 3U VPX card, the V6065 provides three 100G optical interfaces (300Gbps aggregate), large FPGA fabric, ARM processor cores, and XMC site.
The V6065 excels at high-bandwidth interface applications where data is processed or pre-processed locally and then distributed across the VPX backplane or optical interfaces. Use cases include sensor interface, data processing, data distribution, and FPGA co-processing applications. Radar, signals intelligence, electronic warfare, video, storage, medical imaging, and embedded communications systems all can benefit from the V6065 module.
By leveraging the Versal® hard silicon Ethernet interfaces, PCIe controllers, DMA engines, and associated software drivers AMD has enabled a robust ecosystem for high-bandwidth Ethernet performance. In addition to the Ethernet interfaces described, the FPGA fabric provided within the ASoC part is capable of hosting New Wave DV IP cores for Fibre Channel, ARINC-818, sFPDP, Aurora, and others. This makes the V6065 an ideal hardware platform for mixed interface protocol needs or protocol bridging applications.
The V6065 serves as a standalone data interface and processing solution in a single 3U VPX module. The V6065 provides twelve (12) full duplex optical ports supporting from 1-25G per lane, FPGA fabric resources, ARM processor cores, and XMC site. The V6065 can also be used adjacent to CPUs and/or GPUs in a 3U VPX system. In this arrangement, the adjacent CPUs/GPUs are unburdened of the data interface overhead and can be dedicated to running high value applications and algorithms with the V6065 feeding them data directly across the backplane.
The inclusion of an XMC site enables customization and flexibility to meet specific application requirements, such as multi-level security or secure boot. Further, this configuration supports scalability and future XMC module upgrades to increase performance or add new functionalities long into the product’s life. Such an approach enables new system design avenues such as XMC based CPU’s and GPU’s hosted on a 3U VPX FPGA card.
